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29 November 2022

EdgeQ wins Vodafone trial for its RAN accelerator chip, but AI focus has faded

Arguably the biggest challenge in opening up the RAN will be in the semiconductor layer. Traditional RANs run on baseband processors designed by the proprietary equipment vendors specifically to perform RAN tasks. Ericsson sees the performance of these special-purpose chips as fundamental to its networks’ performance. Far from being ashamed of not adopting open processors, it has even adopted an ‘Ericsson Silicon’ brand, reminiscent of ‘Intel Inside’, to emphasize the differentiation.

But the Open RAN vision is that every layer of the network, from chips to management and applications, should be based on common platforms and potentially multivendor. This has prompted a race by the merchant chip firms to develop baseband processors that can compete in performance with the Ericsson architectures. So far, it has proved a key challenge of Open RAN to do this without significant cost and energy penalties, at least in macro networks that need to support processor-intensive capabilities such as Massive MIMO.

The major processor companies – including Intel, Marvell, Nvidia, NXP and Qualcomm – are all working on processor/accelerator combinations targeted at the highest-performance elements of the Open virtualized RAN. But there are start-ups and specialists piling into the race also. Some, such as Picocom, are targeting small cells, whether in integrated or disaggregated implementations. Others are focusing on the accelerator cards specifically, aiming to see them adopted by server makers such as Dell to offload specialist RAN tasks from the central processors and turn those servers into distributed units for vRAN.

One of these challengers is EdgeQ, which recently announced trials with Vodafone. Founded in 2018 in Silicon Valley, the firm boasts former Qualcomm CEO Paul Jacobs as a board member. Its initial pitch was heavily focused on supporting RAN and AI functions on the same platform, but this year, it is emphasizing other points of differentiation for its accelerator.

One is to provide the Layer 1 software as well as the chip rather than relying on a third party or reference stack. Adil Kidwai, head of product management, told LightReading: “Our business model does not allow us to sell silicon where someone ports their software onto our silicon.”

Given that operators criticize Intel because its FlexRAN reference stack can only run on Intel’s own chips, the tight integration of hardware and software could be problematic for some Open RAN purists. But this fits into a wider trend, which has seen more and more Open RAN suppliers start to offer end-to-end platforms or pre-integrated elements in order to save time and cost for operator customers (Mavenir, which makes Open RAN software, has started designing radio units; Rakuten Symphony pre-integrates selected combinations of hardware and software.) The interfaces remain open in those cases, so in theory elements can be swapped out, but this is an industry where vendors have thrived if they can offer operators something that is readily deployable.

At chip level, it is even harder to support a truly mix-and-match environment because of the rarity of appropriate skills. The O-RAN Alliance and China Mobile have conducted projects focused on an open accelerator platform that could work with different stacks, but Kidwai believes operators will be more interested in something that is integrated and optimized, but still programmable. EdgeQ promises that operators can make changes to the algorithms or use their own, if they want to.

EdgeQ provided some more details about its platform in the wake of the Vodafone trial announcement. It claims its accelerator uses up to 30% less power than FlexRAN equipment, something it says is partly down to the use of RISC-V processors rather than Intel x86 or ARM designs.

In the interview, Kidwai said: “We wrote around 150 custom instructions to do 4G and 5G and AI functionality on RISC-V, but these microkernels are written on bare metal RISC-V processors and so there is no compiler or overhead.”

The chip is based on a signal processor running on 50 identical RISC-V cores, licensed from Andes and customized with EdgeQ’s 5G-specific instruction set extensions. The system is dynamically programmable to process the PHY layer functions, which are implemented in software and can be adapted according to the type of base station.

The firm is using ARM architectures in other areas however, particularly for a small cell offering in which ARM cores support Layers 2 and 3. This platform features a network-on-chip (NoC), RF interface, forward error correction (FEC) accelerator, protocol accelerator for Layers 2 and 3, and secure boot. In this case, third party L2 and L3 software is used and there are no customized instructions as there are in EdgeQ’s own L1 stack. The interface between the L1 stack and the higher layers supports the FAPI open interface, specified by Small Cell Forum.

Some aspects of the EdgeQ pitch, which was last detailed about a year ago, have been played down this time. At that time, there was the promise of “a large North American OEM” that would productize the chip, but no further news of this has followed. And in 2021, the company was focusing heavily on its programmability, not so much to support operator extensions and options, as now, but to enable an expansion of the platform into AI.

There have been several start-ups in the past few years that have proposed architectures that would support both 5G baseband and AI on the same platform, sometimes with the workloads being alternated in line with the different cycles. EdgeQ said some of the specialised operations supported by its own instructions are common to both 5G and AI workloads, so the same chip could accelerate both, in parallel or, more efficiently, alternately. This commonality is the basis of many start-ups’ claims to be able to target two of the hottest applications for advanced processors with the same product, though EdgeQ has gone further than most in detailing and demonstrating its capabilities, at least to a closed circle of possible customers and partners.

It claims processor cycles between 5G transmissions can be used to perform AI tasks, effectively multiplexing the workloads together, “much like how virtual machines run,” as Ravuri put it. The customer can decide on the balance between the two types of workload.

However, it seems that the market demand for such platforms has not materialized as quickly as some companies had hoped, or the challenges of achieving optimal performance for two different types of demanding workload have proved tough to address.

In its early days, EdgeQ said the envisaged dual-function products would first be targeted at systems such as AI-enabled cyber-attack detection in 5G networks, and then device-side use cases would follow, such as industrial robots or vehicles that require both AI processing and 5G connectivity.

Like many new players in the mobile chip market, EdgeQ sees Open RAN as a potential entry point. It claims that, by offering production-grade PHY software, rather than just reference software, it saves customers from developing their own implementations, which end up being proprietary. EdgeQ says its software supports key 5G functionality such as beamforming, Massive MIMO and interference cancellation out of the box, in a standard way, which will help enable multivendor networks for operators, while saving cost and time for smaller vendors to develop advanced base stations.

EdgeQ also offers a silicon-as-a-service model. Customers pay a base fee for the chip and a basic 5G implementation and can then pay to enable more advanced functions such as ultra-low latency, location services, RAN sharing, slicing or machine learning, which are delivered via firmware updates.