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Can open source chip cores ever threaten ARM in the IoT?

The open source movement now dominates software, but could it also become the norm in chips? Operating systems like Unix, which could be licensed for many computers, squeezed out single-vendor platforms, but then gave way in turn to fully open source OSs like Linux. Similarly, processor architectures which could be licensed by many chipmakers rose on the back of mass market products which needed a new cost structure – hence ARM’s leadership in handsets, or MIPS’ strength in home gateways and set-top boxes. However, it has been tough for those licensable cores to penetrate the high performance worlds where Intel and a host of specialized architectures still hold sway. That has driven ARM, in particular, to focus intense efforts on the Internet of Things, and on the new breed of low power cloud servers – both nascent markets which will demand very low cost components, and where the ARM model would seem well suited.

But, as in software, an open source model could start to threaten open licensing by promising even lower costs for chip developers, plus an even broader community of innovators and developers to tap into. There are various hopeful architectures, the most prominent being the open source RISC-V core, developed at the University of California at Berkeley (UCB). This is an evolution of one of the original RISC (reduced instruction set computing) cores, developed in the 1980s. In August, UCB scientists showed off the latest processor based on the RISC-V core, Raven 3, claiming this had greater efficiency than an ARM core – 26GFlops per Watt and 80% system efficiency – and so could enable smaller, more power efficient handsets. The 64-bit Rocket scalar core in the Raven 3 chip is smaller than a 32-bit ARM Cortex-A5, it was claimed, and consumes half the power.

The team said their design pointed to new economics for the mobile chip industry, proving that “a dozen grad students can build a compelling chip”. Such pledges, if borne out in the commercial world, could be important in a handset business which is going through saturation and price depression. But they could create even more excitement in the IoT.

Indeed, 15 companies, including Google, have joined together to form a trade alliance around RISC-V, which is drafting an open source licence and member agreement. These will specify a zero-royalty RAND licence and a set of test and verification suites which will be used to award the RISC-V logo. Any changes to the core will have to be contributed as open source, but developers will be able to differentiate themselves, and make revenue, from ‘secret sauce’ implementations outside the core.

David Patterson of UCB, who coined the term RISC when leading the original Berkeley project, launched a new open source effort around RISC-V in August 2014, to enable small start-ups or teams to create processors without the need for an expensive core licence. In the fragmented world of the IoT, this idea could come into its own, making it more viable for companies to develop specialized processors and SoCs for relatively low volume applications.

Google, Hewlett Packard Enterprise (HPE), Lattice, Microsemi and Oracle are among the founders of the trade group, and recently held a workshop which laid heavy emphasis on IoT and cloud server applications. About 150 developers attended, and there are already 48 software contributions on GitHub, some from universities and others from  companies like BAE, Google and LG. A key goal of the workshop was to sign up volunteers to work on the long list of requirements to turn the RISC-V core into a full platform, complete with the kind of support and detailed guides ARM provides. Those requirements include specifications for direct memory access, an I/O memory management unit, an applications binary interface, and hypervisor and security extensions.

This shows that it is very early days. Although some university projects use RISC-V, the only commercially shipping chip is a camera SoC. The core runs Linux and NetBSD, but not the major mobile OSs like Android, though that – together with some embedded real time OSs – are expected to follow this year. However, there is rising interest. An Indian government-backed initiative to set up a national microprocessor lab is to receive $45m to develop a 64-bit chip based on RISC-V, as the country looks to build up a homegrown chip industry, particularly for the IoT.

In the UK, the University of Cambridge’s LowRISC project is creating low cost development hardware around RISC-V and aims to have its first silicon this year, and development boards early in 2017. The team, which includes people who helped create the Raspberry Pi, says its first chip will be a four-core 28nm part. The group’s aim is to move towards a low-cost board made completely with open source digital logic.

While the group members expect initial commercial interest to center on low cost embedded SoCs for connected objects, there is also discussion about using RISC-V cores for FPGA (field programmable gate array) accelerators. As highlighted by Intel’s acquisition of FPGA leader Altera, and Qualcomm’s partnership with its rival Xilinx, the FPGA is increasingly being used to make platforms more flexible by adding programmable accelerators. These mean that a core platform like Intel Xeon can be adapted, through these companions, for a far greater diversity of systems, while avoiding the costs of a completely customized ASIC.

At the workshop, three papers on RISC-V in FPGA accelerators were delivered, including one by a former software architect from Microsoft, which has been conducting extensive work on using FPGA technology in cloud server platforms. The architect, John Gray, has created an FPGA running on 400 RISC-V cores.

There were attendees at the workshop from ARM, but of course the main motivation to adopt an open source core would be to avoid that firm’s hefty licensing fees. It will be at least three years before RISC-V could provide something equivalent to ARM, even according to its enthusiasts, but within one year, it could be a viable platform for a start-up with a new market to address, or one prepared to take a fair bit of risk – and especially for companies developing relatively simple IoT-related chips. “I could see how pretty quickly a RISC-V core could be useful for something simple like a security processor that doesn’t need to run a full operating system,” Eric Mejdrich, a principal hardware architect from Microsoft, told EETimes.

And of course, where there is the chance of an open source standard, Google will never be far away. A Google engineer said it was porting the search giant’s Go programming language to Risc-V, and has its Coreboot firmware – which runs in Chromebooks and Android TVs, and which Google is trying to make a de facto standard – running on the core already.

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