It wasn’t just Intel getting into the spirit of spring with new beginnings. ARM, too, unveiled its first completely new micro-architecture for a decade, promising a “rolling program” of enhancements to the new ARM v9 platform, that would steadily increase performance, security and robustness over the coming years.
The ARMv9 architecture is designed to enable licensees to target the highest performance applications and increase the assault on Intel’s strongholds in the data center and cloud. Acceleration for AI and 5G, and enhanced security, were the hallmarks of the launch at the recent ARM Vision Day.
Richard Grisenthwaite, SVP and chief architect, said: “Armv9 is a rolling program with substantial enhancements to the architecture that we’ll be deploying over the next few years, increasing the computing capability in the widely applicable areas of digital signal processing and machine learning, and improving the security and robustness of our systems.”
The new architecture builds on the capabilities of ARMv8, the firm’s first 64-bit platform, and will target the next generation of chips in core ARM markets such as connected devices, smartphones and consumer electronics, as well as expansion in the edge, data center, telecoms network and Internet of Things.
Security was at the heart of the launch, with ARMv9 promising native support for confidential computing. The Confidential Compute Architecture (CCA) builds on ARM’s long-standing efforts in hardware-level security, such as TrustZone, and effectively segregates secure workloads from others by shielding certain code and data from access while in use. The system dynamically allocates ‘realms’ to different applications and allows for memory encryption.
Microsoft endorsed the new approach, with its Azure CTO Henry Sanders saying in a statement: “The increased complexity of use cases from edge to cloud cannot be addressed with a one-size-fits-all solution. ARM is in a unique position to accelerate heterogeneous computing at the heart of an ecosystem, fostering open innovation on an architecture powering billions of devices.”
The importance of AI in ARM’s new platform is not just to help its processors cope with demanding deep learning workloads, but with the extension of AI capabilities into the most humble devices. According to the company, there were more than 8bn AI-enabled voice-assisted devices in use last year, and it forecasts that by 2025, over 90% of all on-device applications will contain some AI elements. Of course, uncertainty hangs over all ARM’s future strategies, depending on whether its acquisition by Nvidia is approved to go ahead, but Grisenthwaite focused on at least one potential upside – the would-be acquirer’s expertise in AI and machine learning.
There may be opportunities to embed Nvidia technology into ARM products in future to enhance AI/ML capabilities, but for this month’s launch, the key partner was Fujitsu. ARM worked with the Japanese vendor to create a Scalabel Vector Extension (SVE), which handles AI processing and training in the ARM-based Fugaku supercomputer. This highly specialized piece of work will now be introduced to mainstream products with SVE2, which will be able to address many AI/ML and digital signal processing workloads, including advanced AR/VR, image processing and 5G.
The company is targeting at least 30% better performance over the next two generations of mobile and infrastructure processors thanks to v9, but acknowledged that “as the industry moves from general purpose computing toward ubiquitous specialized processing, annual double-digit CPU performance gains are not enough”.
This reveals a philosophy that is central to 5G as well as other technologies that place extreme demands on processors, but also need to be flexible to adapt to limitless numbers of different applications. The idea that such technologies could be supported by general purpose processors alone has been dismissed even by Intel (see separate item), and the new goal is to support specialized and optimized processing, to support different workloads such as DSP, on top of a general platform with a broad ecosystem.
ARM’s approach to this challenge is called the Total Compute design methodology, which aims to accelerate processor performance to suit different workloads, using system-level hardware and software optimizations.
“Increasingly, we’re looking to maximize the performance that the CPU provides through the system design. In fact, we can see more than a generation of CPU that can be gained through pushing the path to the memory from the CPU,” Peter Greenhalgh, VP of technology at ARM, said. The aim will be to address clock frequency, bandwidth, cache size and memory latency to, collectively, maximize the performance of v9 processors.
Greenhalgh told EETimes that specialized accelerators for AI/ML, video and other tasks are “here to stay” but must be programmable so that they can be used easily in a cloud environment and adapted for many purposes. But if they gain their own libraries, compilers and security, they start to look like CPUs.
Greenhalgh said: “From this perspective, our belief is that we should continue to extend the CPU architecture so that our CPUs can accelerate even more workloads and do so in a way that is programmable, protected, pervasive, and proven. Today it’s impossible to ignore how fragmented some of the AI and DSP workloads are in the mobile market and how they can benefit from being coalesced onto a CPU environment. This is where we want to push our architecture and compute designs.”
“We believe that purpose-built system design will be the key to innovation in all forms of computing,” said Grisenthwaite. “Different computing problems need different mixes of computing components. Many IoT devices need to interpret their world, and a combination of the M profile cores with the Ethos-U55 microNPU is perfect there. In automotive systems, partners will increasingly be combining many large and small CPUs with GPUs, NPUs and their own IP to generate the right computing solution for those autonomous systems.”
The v9 architecture is available for licence now, and the first commercial chips based on the architecture are expected to ship by the end of 2021.