CEVA has unveiled a rather cool chip that aims to supply developers with silicon that can handle a plethora of IoT wireless standards, in a package that should cut costs by combining the DSP (digital signal processor) with the CPU. CEVA claims the design eliminates the need for a separate CPU core to handle the higher level stacks.
The chip is called the CEVA-X1, and its inventor claims that it provides a unified platform for low-throughput cellular IoT standards – including LTE Cat M1, LTE NB-IoT, upcoming 5G specs, LoRa, Sigfox, and shorter range personal area networks (PAN) like Bluetooth, WiFi, ZigBee, and Thread. It also supports GPS, GLONASS, Galileo, and Beidou, for GNSS apps.
Described as a multi-mode processing hub, the CEVA-X1 is CEVA’s latest riff on its new CEVA-X architecture. The design uses a new extended Instruction Set Archecture (ISA) that CEVA allows it to more efficiently handle software workloads in combination with the DSP processing that turns radio waves into intelligible code.
CEVA points to EEMBC CoreMark benchmarks as proof of its performance, and says that the CEVA-X1’s score of 3.3 CoreMark/MHz puts it on par with the ARM Cortex-M4’s score of 3.4, which is the most commonly used processor design in IoT stacks. CEVA argues that this score removes the need for developers to include a separate CPU processor alongside the DSP.
The company points to a standalone smartwatch use case, that is one which doesn’t need to be tethered to a phone, as proof of the new ships performance. It claims that the complete NB-IoT (Cat-NB1) modem, including the protocol software stack and the PHY layer stack, and a concurrent GPS stack requires less than 150MHz of processor – which leaves “ample headroom” for additional functions like sensors. CEVA claims that the design can reduce the non-RF power consumption of the NB-IoT modem by 30%.
It’s a pretty big step towards miniaturization, and CEVA (correctly) claims that this opens the door for cost and power savings, as well as greater efficiency in coding efforts. For CEVA, it potentially means more chip sales, including increases in shipments of its peripheral silicon like the Cat-M1 Turbo decoder.
In terms of target markets, CEVA is aiming for wearables and connected health, asset tracking, smart home, agricultural and industrial, and smart city. The chip claims full RTOS support, without singling out any in particular – although the RTOS landscape is one that is changing fairly frequently.
With a strong focus on low-power and sub-Mbps wireless applications (i.e. all of the battery-life sensitive IoT apps), CEVA is hoping that the promised 30% saving is enough to get developers experimenting with the platform, in the hopes of eking out a longer lifetime for their battery-constrained devices, potentially at a noticeably lower BOM too.
Michael Boukaya, VP and GM of the Wireless business unit, said “the CEVA-X1 is a first-of-its-kind processor, custom designed to address the unique and diverse needs of connecting the IoT ecosystem. Our deep knowledge in cellular and wireless connectivity allowed us to develop the industry’s lowest power processor for cellular IoT, and ensure outstanding performance for any other IoT-related standard.”