This year has seen Intel putting together a heavyweight portfolio of chips and associated services to support 5G, as it plays for a significant role in the next generation of mobile networks. Its latest step is to combine its FPGAs (field programmable gate array) chips, which are commonly used as accelerators for RAN functions that are not easily supported by standard cloud processors, with RF technology from Analog Devices (ADI).
This combination, together with developer tools, will be targeted at designers of 5G radio units within a virtualized RAN environment. This sees Intel extending its reach beyond its natural comfort zone of processors for cloud infrastructure, and right to the edge of the 5G network, where very specialized chips will still be required.
Most vRANs will be built around three elements. The centralized unit (CU) will support network functions that do not require very low latency and will usually be built on common cloud infrastructure, in which Intel processors are dominant, even though ARM-based designs are also gaining ground.
The distributed unit – which may sometimes be collocated with the CU or cell site – will support the near-real time functions of the RAN, including ultra-low latency response, high end signalling, synchronization, dynamic spectrum sharing and others. The DU will often require powerful accelerators, typically based on FPGAs, to offload the more demanding processes from the main processors. Ericsson has also been working with Nvidia on a GPU-based approach, though some DUs will also continue to run on proprietary, high performance architectures, at least in the early years.
In March, Intel unveiled a set of CPUs, FPGAs and structure ASIC chips that would support a wide range of different DU designs, varying according to network size, DU/CU location and other considerations. In this space, solutions based on ARM processors plus accelerators are also gaining ground, led by Marvell.
The third element is the radio unit (RU), the radio/antenna which sits at the cell site. It may also have some virtualized functions running alongside it, but it remains a physical element requiring very specialized technology. The radio is a less welcoming place for Intel to be than in the CPUs that will support cloud infrastructure for vRAN, but all the major network chip providers have become increasingly convinced that, if they are to secure real scale in the 5G market, they need to have end-to-end solutions. Back at Mobile World Congress 2019, executives from both Intel and Marvell set out their roadmaps to offer chips for each link in the 5G chain, from radio to vRAN to core to xHaul, and both these vendors have been adding significant new offerings to their portfolios ever since.
Intel’s new radio platform combines ADI’s software-defined RF transceiver technology with its own Arria 10 FPGAs to support 5G RUs, particularly those supporting open platforms such as O-RAN (though the offering also supports proprietary fronthaul links between the RU and DU if required).
“ADI and Intel are developing an O-RU reference design to enable commercialization of hardware and software. Systems integrators and operators can port their code onto open processors and perform integration testing between the O-DU (which hosts the upper PHY and Layer 2) and the O-RU (which contains the lower PHY and RF subsystem),” said Joe Barry, ADI’s VP of wireless communications.
The partners say the combined offering will be pre-integrated and therefore will reduce the cost and time to develop an open RU, lowering barriers for smaller RAN suppliers to enter the market, especially in enterprise and small cell platforms. One of the key goals of supporters of open RAN – including large operators and cloud infrastructure players like Intel – is to inject new competition into the supply chain, bringing price competition and innovation for the MNOs, and a broader base of customers for the suppliers.
Only last week, however, a potential split in the O-RAN effort appeared when the Open Networking Foundation announced a plan for its own implementation of key elements of the architecture, claiming the O-RAN Alliance had become too vendor-driven and too slow-moving. Intel signed up as a founder member of the new effort, which is labelled SD-RAN.
The diversifying use cases for 5G, especially in industrial environments, are making new demands of the network. On the DU side, hopes that commoditized processors will be able to support the functionality are often dashed by the moving target for low latency and high availability.
In the RU, there are many challenges associated with 5G, including the use of very wide channels, very low latency, and very high frequency spectrum with associated beamforming requirements. The proliferation of 5G bands, from 600 MHz to almost 7 GHz (the so-called sub-6 GHz FR1 bands), and on up to millimeter wave, means that it is hard to keep RF performing efficiently while also being cost-effective and power-efficient.
The Intel/ADI offering will not yet address mmWave spectrum but it can support any band from 600 MHz to 6 GHz, with a production-ready software and firmware framework.
“Add higher frequencies of C-Band to the mix along with the requirement to coexist with existing base station equipment and the path to RF success narrows significantly,” Barry told EETimes. “A successful strategy we see is to pick a flexible radio architecture that meets these performance challenges while simplifying the RF front end to reduce power and cost.” This is particularly important with the dense radio signal chains involved in Massive MIMO antenna arrays in higher frequencies.
ADI says its fifth generation of RF transceiver chips, Zero IF, addresses all kinds of base stations from high orders of Massive MIMO, to wide area macrocells in low frequencies, to low power small cells. This technology will be paired with digital front end functionality running on Intel’s Arria A10 FPGAs. Because these are programmable, they can be customized to specific spectrum bands, power levels and performance requirements, with greater flexibility and lower cost than designing a fully custom ASIC. FPGAs also allow for remote upgrades when spectrum bands or 5G radio specifications change.
Ronnie Vasishta, general manager of Intel’s network and configurable logic division, explained in an interview: “New features for new markets can be rapidly introduced and verified, accelerating time to market and adapting quickly to changing requirements without replacing the already installed equipment. This drastically lowers the opex. Additionally, different 5G configurations can use a common FPGA platform to be scalable and support different network partitions.”
Such comments highlight the strategic importance to Intel of its acquisition of Altera, one of the two leading FPGA vendors (along with Xilinx), in late 2015. It was clear at the time that vRAN would be a typical target market, and that Intel was finally acknowledging that its x86 processors would not be sufficient, on their own, to meet every requirement in challenging cloud applications such as 5G RAN.
It has also added structured ASIC capabilities with the purchase of eASIC in 2016, and Vasishta is keen to talk up the full portfolio Intel is assembling “to accelerate and optimize the roll-out of 5G networks, including network-optimized CPUs, structured and custom ASICs, Ethernet network interface cards (NICs), and the FlexRAN software reference architecture.”
On the ADI side, the O-RU platform will be part of its Radioverse set of solutions, tools, reference designs, software and technology resources. “It’s a commercial-grade resource that designers will use as a platform or reference design to build from or integrate directly into their next generation small cell, micro or macro radio projects,” said Barry.